U.S. Semiconductor Ecosystem Map

Last updated March 28, 2024

The U.S. semiconductor industry is one of the world’s most advanced manufacturing and R&D sectors. The U.S. Semiconductor Ecosystem Map demonstrates the breadth of the industry, including locations conducting research and development (R&D), intellectual property and chip design software providers, chip design, semiconductor fabrication, and manufacturing by suppliers of semiconductor manufacturing equipment and materials. Adjust the filters below, hover over a pin, and zoom in on the map to see more information. A glossary of key terms can also be found below. For a map of semiconductor ecosystem projects announced since introduction of the CHIPS Act, please visit this page.

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Name	City	State	Industry Segment	Facility Activity	Investment	Jobs Expected	Existing / Announced	Source

Methodology: The locations on this map are sourced from SIA’s compilation of company information, 10-K filings, and other public and internal sources. The included university locations are R&D partners of the Semiconductor Research Corporation or the National Nanotechnology Coordinated Infrastructure (NNCI). The map excludes locations whose only activities are administrative or operational. This map is not intended to be a reflection of all U.S. semiconductor ecosystem locations and largely represents the U.S. locations of SIA member companies. Please contact Alex Gordon at agordon@semiconductors.org with any questions.

Glossary

Intellectual Property (IP) – A design or verification unit that is pre-packed and available for licensing, generally as an “IP block” or “IP core.” IP has become essential for the creation of large and complex devices as it would be nearly impossible for any single company to develop all of the blocks necessary for these devices. (Source)
Electronic Design Automation (EDA) – Electronic Design Automation, or EDA, is a market segment consisting of software, hardware, and services with the collective goal of assisting in the definition, planning, design, implementation, verification, and subsequent manufacturing of semiconductor devices, or chips. (Source)
Fabless – A semiconductor design company with no or limited wafer fabrication capability. (Source)
Chip design – The process of laying out the “architecture” of a chip to achieve a specific function or application. An extremely R&D, engineering, and IP intensive process of mapping billions of transistors and electronic components (hardware) to relay instructions to the device (software).
Foundry – A factory that manufactures semiconductor chips on wafers. Usually used to denote a facility that is available on a contract basis to companies that do not have wafer fab capability of their own, or that wish to supplement their own capabilities. (Source)
Integrated Device Manufacturer (IDM) – A vertically integrated semiconductor company that designs, manufactures, and sells integrated circuits (ICs). (Source)
Outsourced Assembly and Test (OSAT) – Vendors that provide third-party semiconductor assembly, test, and packaging (ATP) services. IDMs and foundries with internal packaging operations also may outsource a certain percentage of their packaging production to OSATs. Fabless companies also outsource their packaging to the OSATs and/or foundries. (Source)
Equipment – Hundreds of different specialized pieces of semiconductor manufacturing equipment “tools” that conduct deposition, photoresist coating, lithography, etching, ion implantation, packaging, and dozens more operations, all conducted under highly controlled conditions.
Materials – Hundreds of specialty and high-purity gases, chemicals, metals, and substrates that serve critical uses in the chipmaking and equipment making process, ranging from silicon and rare earth metals, to helium and optical lenses.
University R&D Partner – Universities with semiconductor programs and are partner institutions of the Semiconductor Research Corporation (SRC) or the National Nanotechnology Coordinated Infrastructure (NNCI).